(1) Field of the Invention
The present invention relates to a circuit for processing an analog signal which is obtained from a photoelectric transformation of a reflected light when scanning a bar code by a light beam. Bar codes are used as the Universal Product Code, the Universal Vender Marking, the European Article Number, and the Japanese Article Number for source marking of commodities. The bar codes consist of series of parallel dark bars and light spaces between the dark bars. The widths of the dark bars and the light spaces are generally different for defining various characters. To read the bar codes, an apparatus called a bar code reader is provided. The bar code is scanned by scanning a light beam which is output from the bar code reader, and a variation of the intensity of reflected light from the bar code is detected in the bar code reader. The reflected light is first transformed to an analog electric signal. The analog signal is transformed to a binary signal having two levels respectively corresponding to the above-mentioned dark bars and light spaces in the bar code, to detect the dark bars and light spaces. Since the above source marking is defined by the widths of the dark bars and the light spaces, it is required to exactly detect the transition points between the dark bars and the light spaces, i.e., the transition points between the high level and the low level.
(2) Description of the Related Art
U.S. Pat. No. 4,000,397 discloses a technique wherein the analog signal responding to the intensity of the reflected light is differentiated twice. FIG. 1 shows the construction of a conventional circuit for processing the analog signal which is obtained by the above scanning of the bar code and the photoelectric transformation from the reflected light in the bar code reader. FIG. 2 shows the timing of the operation of the construction of FIG. 1
In FIG. 1, reference numeral 1 denotes a bar code, 2 denotes a light receiving device, 3, 6, and 9 each denote an amplifier, 4 and 7 each denote a differentiating circuit, 5 denotes a filter circuit, 71 denotes a capacitor, 72 and 81 each denote a resistor, 8, 16, and 17 each denote a comparator, 10 denotes a slice signal generation circuit, 11 denotes a DC voltage level detecting circuit, 12 denotes a peak hold circuit, 13 denotes a discharge circuit, 14 denotes an inverting amplifier, 18 denotes an inverter, 20 and 21 each denote an AND circuit, 22 denotes an RS-type flip-flop circuit, and 23 denotes a voltage dividing circuit.
The reflected light from the bar code is transformed to an analog electric signal as shown by "a" in FIG. 2, where the amplitude of the analog electric signal corresponds to the intensity of the reflected light which changes between the dark bar portions and the light space portions. The analog electric signal is amplified in the amplifier 3, and is differentiated in the differentiating circuit 4 to obtain transition points of the analog electric signal as peaks of the differentiated signal. The differentiated signal is shown by "b" in FIG. 2. The filter circuit 5 is provided to eliminate the components of the frequency ranges outside of the frequency ranges of the required signal from the differentiated signal. The output of the filter circuit 5 is amplified in the amplifier 6 and is differentiated again in a differentiating circuit formed by the capacitor 71 and the resistor 72. The twice-differentiated signal is shown in FIG. 2, and is denoted by "e". Thus, the above transition points are exactly obtained as zero-cross points of the twice-differentiated signal. The twice-differentiated signal "e" is compared with a threshold level of ground in the comparator 8 to obtain the zero cross points of the twice-differentiated signal as leading edges and trailing edges. The output of the comparator 8 is shown by "f" in FIG. 1.
The above zero-cross points do not necessarily correspond to the transition points of the analog electric signal "a". To pick up the zero-cross points corresponding to the transition points, gate signals are generated in the slice signal generation circuit 10 and the comparators 16 and 17, as explained below.
The above output of the filter circuit 5 is also amplified in the amplifier 9, and is supplied to the slice signal generation circuit 10 and the comparators 16 and 17. The DC voltage level detecting circuit 11 detects an average DC voltage level of the output of the amplifier 9, and the detected DC voltage level (which is shown by "t" in FIG. 2) is supplied to the discharge circuit 13, the voltage dividing circuit 23, and the inverting amplifier 14. The peak hold circuit 12 detects the peak level of the output of the amplifier 9, and the detected peak level is supplied to the discharge circuit 13. A voltage which is equal to the difference between the detected peak level and the detected DC voltage level is charged in a capacitor (not shown) in the discharge circuit 13, and the charged voltage is slowly discharged. The above outputs from the discharge circuit 13 are shown by "u" in FIG. 2. Then, the voltage charged in the capacitance is output from the discharge circuit 13 to the voltage dividing circuit 23, and a half of the voltage of the output of the discharge circuit 13 is output from the voltage dividing circuit 23. The above average DC voltage level is used as a reference level in the voltage dividing operation in the voltage dividing circuit 23. The output of the voltage dividing circuit 23 is supplied to the circuit 15 as a positive slice level, and is also supplied to the inverting amplifier 14. The inverting amplifier 14 inverts the polarity of the output of the voltage dividing circuit 23 using the output of the average DC voltage level as a reference voltage. The output of the inverting amplifier 14 is applied to the positive input terminal of the comparator 16 as a negative slice level. The above output of the voltage dividing circuit 23 is applied to the negative input terminal of the comparator 17. The above outputs from the voltage dividing circuit 23 and the inverting circuit 14 (the positive and negative slice levels) are respectively shown by "v" and "w" in FIG. 2.
The comparator 16 receives the output of the amplifier 9 at the negative input terminal, and the comparator 17 receives the output of the amplifier 9 at the positive input terminal. The output of the comparator 17 is positive only when the level of the output of the amplifier 9 (the once-differentiated signal) is higher than the positive slice level "v", and the output of the comparator 16 is positive only when the level of the output of the amplifier 9 (the once-differentiated signal) is lower than the negative slice level "w". The output of the comparator 17 provides a gate signal to pick up rising points of the output of the amplifier 3 (the aforementioned analog electric signal), and is shown by "h" in FIG. 2. The output of the comparator 16 provides the other gate signal to pick up falling points of the output of the amplifier 3 (the aforementioned analog electric signal), and is shown by "g" in FIG. 2.
The gate signals "h" and "g" are respectively applied to one of the input terminals of the AND circuits 21 and 20. The above output "f" of the comparator 8 is applied to the other input terminal of the AND circuit 21. On other hand, the output "f" of the comparator 8 is inverted in the inverter 18, and the inverted signal is applied to the other input terminal of the AND circuit 20. The outputs of the AND circuits 20 and 21 are respectively shown by "i" and "j" in FIG. 2. Thus, rising zero-cross points of the twice-differentiated signal "f" corresponding to the negative peaks of the analog electric signal "a" are obtained as the leading edges of the output of the AND circuit 20. Falling zero-cross points of the twice-differentiated signal "f" corresponding to the positive peaks of the analog electric signal "a" are obtained as the leading edges of the output of the AND circuit 21. The outputs of the AND circuit 21 and 20 are respectively applied to the set input terminal S and the reset input terminal R of the RS-type flip-flop circuit 22. Thus, the Q-output of the RS-type flip-flop circuit 22 rises exactly when the analog electric signal rises, and falls exactly when the analog electric signal falls.
However, the above conventional circuit for reprocessing an analog electric signal obtained from the reflected light signal from a bar code responding to the scanning light, suffers much from the high frequency noise due to the double differentiation because the differentiating operation decreases the amplitude of the signal components. However, high frequency noise passes the differentiating circuit without much decrease in its amplitude. Thus, the double differentiation greatly deteriorates the S/N ratio in the processed signal and the accuracy in detecting the transition points in the analog electric signal from the light receiving device, i.e., the widths of the dark bars and light spaces.
For example, when a high frequency noise as shown by "N" in FIG. 2, overlaps the processed signal, the noise component N passes through the comparator 8. The output "f" of the comparator 8 suffers from the noise as shown in FIG. 2, and changes the position of the zero cross point in the output "f" of the comparator 8. In the example shown in FIG. 2, the error caused by the noise in the output "f" of the comparator 8 is shown by "T".